Programmable Photonics: A South Korean Chip Controls and Slows Down the Speed of Light
The exponential increase in data traffic in data centers daily encounters physical bottlenecks due to high energy consumption and bandwidth limits of metallic interconnections. In this scenario, optical computation—which employs photons instead of electrons for processing and transferring information—represents the most promising technological response, as it ensures high theoretical speeds and a significant reduction in thermal dissipation.
However, the practical implementation of optical circuits presents an intrinsic obstacle: light travels at a constant speed in the medium, making the management of time delays, phase synchronizations, and memory buffering functions extremely complex; these are essential for managing data flows in computational architectural complexes.
To overcome this rigidity, a research team from multiple universities comprising scholars from Seoul National University (led by Professors Namkyoo Park and Sunkyu Yu from the Department of Electrical and Computer Engineering) and the University of Seoul (under the guidance of Professor Xianji Piao from the School of Electrical and Computer Engineering) has designed and modeled a programmable integrated photonic circuit. The details of the study were published in the scientific journal Advanced Science.
Conceptual diagram of the programmable CRIT photonic integrated circuit: illustrates how optical pulses undergo variations in time delay and frequency characteristics as they propagate through the circuit. Source: Faculty of Engineering, Seoul National University
The developed methodology is based on an optical phenomenon known as Coupled-Resonator-Induced Transparency (CRIT), which exploits constructive and destructive interference between multiple optical resonators to allow light passage within a specific frequency band while simultaneously reducing its group velocity (the so-called "slow light" phenomenon).
Until today, CRIT-based devices suffered from a structural limit: their operating properties were determined at the lithographic manufacturing stage. Any modification of the delay length or operating frequency required re-designing and producing a new chip, increasing costs, development times, and architectural complexity in the network infrastructure.
The South Korean researchers circumvented the problem by treating the two fundamental optical states of the CRIT system—the bright mode and the dark mode—as a single integrated degree of freedom. They added two dynamic and controllable loop couplers to this structure. This configuration allows for software-level reconfiguration of the interference between the modes, unlocking the possibility of varying functional parameters in an already fabricated circuit.
Theoretical and numerical simulations have shown that using the two loop couplers allows for real-time modification of bandwidth amplitude, passband shape, accumulated signal delay, and overall transmission efficiency along the entire chain of resonators. The system has also proven capable of performing optical signal frequency conversion without requiring additional dedicated hardware modules.
The industrial feasibility of the project has been tested through three-dimensional electromagnetic (3D EM) simulations on a silicon nitride photonic platform, one of the most stable and low-loss options in the field of Photonic Integrated Circuits (PICs). The analysis considered multiple real disturbance factors: material losses, variations in the quality factor ($Q$) of resonators, backscattering phenomena, coupling fluctuations, phase errors in loops, and thermal crosstalk effects (parasitic thermal interference between adjacent components).
The results indicate that the architecture maintains stability and operability even in the presence of the process tolerances typical of mass production. As highlighted by Prof. Namkyoo Park, co-author of the study, the next step will be to extend this architecture toward large-scale integrated photonic circuits based on silicon photonics and architectures dedicated to photonic AI.
The potential to condense multiple functions—signal synchronization, variable delay lines, optical buffers, and frequency conversion—into a single programmable chip paves the way for software-defined optical systems. In the medium and long term, the adoption of these reconfigurable components could significantly reduce the energy footprint and size of AI servers and hyperscale data centers, finding applications in autonomous driving, next-generation communications, and quantum technologies.