Is Intel Changing Its Plans? The 14A2 Process Could Be the Definitive Answer to TSMC

Intel is reportedly planning an evolution of its 14A manufacturing process, even before its commercial debut. According to rumors from South Korea, the company is evaluating the introduction of a new process called 14A2, aimed at refining the 1.4-nanometer technology with the goal of improving density, performance, and manufacturing efficiency to compete more effectively with future solutions from TSMC and Samsung.

The main novelty would concern the power distribution system. The 14A process was designed around PowerDirect technology, which uses a power delivery network on the back of the wafer (Backside Power Delivery Network, BSPDN). For the subsequent 14A2, Intel is considering a Dual Side configuration, where power would be distributed from both the back and front sides of the chip.

This modification is mostly related to the further miniaturization of the process. Sources indicate that the M0 pitch, or the distance between the metal lines of the first interconnection level, should decrease from the 28 nanometers planned for 14A to 21 nanometers for 14A2. Reducing this parameter allows for an increase in the number of transistors that can be integrated on the same surface, improving circuit density, but also introduces new challenges from an electrical perspective.

Apparently, the 14A2 would be different from the 14A-E already included in Intel's manufacturing process roadmap. Closer interconnections lead to an increase in the resistance of conductors, resulting in voltage drops that risk compromising the chip's operation. In particular, the current nano Through-Silicon Vias (nTSV) designed for an exclusively backside power distribution may not be sufficient to support the new densities achieved by the 14A2.

To overcome these limits, Intel is studying a hybrid structure where the BSPDN network will continue to represent the main power system, while part of the load would also be transferred to the front metal layers. This solution would maintain high circuit density while reducing the effects of increased electrical resistance.

The adoption of the 21-nanometer pitch would also have an additional advantage: improving the economic utilization of expensive High-NA EUV equipment, essential for producing the most advanced nodes. According to the rumors, the 14A will already offer an increase in transistor density of about 30% compared to the previous generation, while the 14A2 is expected to go further with the introduction of double patterning and additional layout optimizations.

After years of delays in manufacturing processes, the success of future 18A-P, 14A, and the possible 14A2 technologies will be crucial in demonstrating the company's competitiveness in terms of both products and contract manufacturing, especially as the rising demand for chips intended for artificial intelligence continues to increase pressure on the entire semiconductor industry.