NEO Semiconductor Demonstrates 3D X-DRAM: A Step Forward Towards 3D DRAM
NEO Semiconductor has announced that it has successfully completed the proof-of-concept (POC) phase of its 3D X-DRAM technology, marking a significant step in the development of high-density memory solutions aimed at AI systems and data-centric applications.
Concurrently, the company announced a new strategic investment led by Stan Shih, a historical figure in the industry and former leader at Acer, as well as a member of the TSMC board for over twenty years. This operation aims to support the next phase of technological and industrial development.
One of the most relevant aspects that emerged from the tests concerns the possibility of realizing 3D X-DRAM by leveraging existing infrastructures for 3D NAND memory production. This includes the use of established materials, equipment, and processes, with potential cost and scalability benefits.
Considering that three-dimensional NAND has already surpassed 300 layers in commercial production, the prospect of a 3D DRAM built on similar foundations could represent a natural evolution to increase density without exclusively relying on lithographic scaling.
The experimental chips have shown encouraging electrical and reliability parameters:
- Read/write latency lower than 10 ns
- Data retention exceeding 1 second at 85 °C, about 15 times beyond the JEDEC standard (64 ms)
- Resistance to disturbances on bit-line and word-line exceeding 1 second at 85 °C
- Endurance greater than 10¹⁴ cycles
According to Andy Hsu, these results confirm a possible new scaling path for DRAM, with margins for improvement in density, energy efficiency, and costs.
The POC was developed in collaboration with National Yang Ming Chiao Tung University and was carried out at the Taiwan Semiconductor Research Institute.
The tests included thorough checks of stability and reliability, yielding positive results. The financial resources raised will be used for subsequent developments, including array-scale implementations and multilayer chips.
NEO has also initiated contacts with memory and semiconductor industry companies to explore partnerships and licensing models.
In summary, significant steps are being taken towards the commercialization phase.