AMD Unfazed by NVIDIA: In Its Tests, EPYC Venice Beats the Vera CPU

AMD must not have taken kindly to NVIDIA's grand entrance into the server CPU market with the Vera project, nor to the way the company released the initial performance tests. The moral of the story? AMD decided to respond in kind, publishing an analysis that highlights its EPYC architectures—current Turin and upcoming Venice—on scenarios designed to reflect the needs of modern AI agent systems. And it did so, of course, by directly comparing itself to proposals from Intel and NVIDIA.

The dominant narrative of the AI investment cycle in recent years has revolved almost exclusively around GPUs. However, AMD emphasizes a often-overlooked infrastructural point: production AI agent systems are not limited to model inference. Each running agent depends on a sophisticated set of supporting services—orchestration, transactional databases, web frontends, API endpoints, in-memory caches, middleware—that are predominantly tied to the CPU and scale with the number of concurrent agents, not the size of the model.

This premise shifts the relevant unit of measure from individual processors to the entire rack: the pertinent question is not how many operations a socket performs, but how much service capacity can be hosted within a fixed power and cooling budget.

AMD built its analysis by normalizing all configurations on a 100 kW reference rack with 2P (two processors per node) platforms and selecting various types of relevant workloads. The number of nodes per rack and system power were normalized against the NVIDIA Vera baseline.

In the normalized geometric mean of the considered workloads, AMD EPYC 9965 ("Turin", 192 cores) would be 2.37 times more efficient than NVIDIA Vera (88 cores, "Olympus" architecture) on an equal energy budget. A future EPYC Venice CPU (256 cores, Zen 6 architecture) would extend the advantage over Vera to up to 3.3 times.

On the rack density front, AMD today reports over 27,000 cores per rack on the Turin platform in a liquid-cooled configuration (e.g., Dell PowerEdge IR7000); Venice is designed to exceed 36,000 cores per rack on the same class of infrastructure.

Regarding single-thread performance, AMD estimates that a 64-core Venice chip has a 27% core advantage over the 88-core Vera; in the 96-core variant of Venice, the margin would drop to 11%, while maintaining a higher core density.

Of course, it’s worth noting that AMD selected the tests favorable to its architecture, but NVIDIA did the same. It is clear that any direct comparison will need to be viewed in light of independent tests that will arrive after the AMD Advancing AI 2026 event on July 22-23, which is expected to host the official launch of Venice and provide further technical details.

In the meantime, the data published by AMD indicates a plausible direction: Venice will almost certainly be a top-tier server processor, likely the densest and most performant in its category. But between "likely" and "proven," there are still a few weeks of waiting.